T-efficient unitary synthesis via block-sparse Hamiltonian simulation

We construct Clifford+ T circuits implementing arbitrary n-qubit unitaries with worst-case T-count (N 8/7) at constant operator-norm error, where N=2 n, improving the previous exponent 5/4. The construction uses (N 6/7) clean ancillas. The main idea is to reduce the data addressed by each query to the block-encoding circuit for a sparse piece while controlling the additional simulation work needed to combine the pieces. We simulate a Hermitian logarithm of the target by flattening its traceless part with a two-layer random similarity transformation, randomly partitioning the transformed generator into block-sparse Hermitian pieces, and combining their evolutions using qDRIFT. For a target operator-norm error ε in(0,1/2), let L= 2(N/ε), the qubit count plus the requested bits of accuracy. By successively correcting the approximation error, we obtain a circuit using (N 8/7L 3/7+NL) T gates and (N) clean ancillas whenever L N. We also prove that, at constant precision, the exponent 8/7 is optimal within a sequential block-SELECT model.