Securing Load Balancing over QUIC
Garegin Grigoryan, Dagim Mindaye, Shireen Maini, Minseok Kwon
cs.NI, cs.CR
Submitted: 2026-08-04
Journal ref: 2026 IEEE 27th International Conference on High Performance Switching and Routing (HPSR)
DOI: 10.1109/HPSR68369.2026.11615179
Code: https://github.com/aiortc/aioquic
License: http://creativecommons.org/licenses/by-nc-sa/4.0/
The gist: In-network load balancing outperforms traditional software load balancing while costing less.
Terminology
Abstract
In-network load balancing outperforms traditional software load balancing while costing less. For instance, programmable switch ASICs can use hashing to select the backend server for the initial packet of each flow at the line rate. However, when the pool of available servers changes, ensuring that the subsequent flow packets are mapped to the same server is challenging due to the data plane's limited memory resources and performance requirements. With the emergence of the QUIC transport protocol, several works show how Connection ID fields (CIDs) can embed the server identifier for all non-initial packets. This approach requires modifications on the server side and violates the QUIC specification, which mandates that CIDs remain unlinkable. In this work, we show that stateless QUIC load balancing can be implemented inside the data plane with no changes to CIDs. Moreover, QUIC packets, except the initial client packet, can bypass the load balancer. We also investigate and mitigate attacks on QUIC in this scenario, including full load balancer bypass and 0-RTT IP spoofing.
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