Scheduling Parallel Optical Circuit Switches for AI Training

arXiv:2603.07373 · cs.NI, cs.AI · Submitted 2026-03-07 · Read on arXiv

cs.NI, cs.AI

Submitted: 2026-03-07

Updated: 2026-10-09

Code: https://github.com/microsoft/Megatron-DeepS

Terminology

• Benchmark — 2× in this paper · explained in 2 episodes

Sources

• RailX: A Flexible, Scalable, and Low-Cost Network Architecture for Hyper-Scale LLM Training Systems
• Vermilion: A Traffic-Aware Reconfigurable Optical Interconnect with Formal Throughput Guarantees
• Approximation algorithms for Job Scheduling with reconfigurable resources
• Sparse Checkpointing for Fast and Reliable MoE Training

Related papers

• HiFiNet: Hierarchical Fault Identification in Wireless Sensor Networks via Edge-Based Classification and Graph Aggregation
• PACC: Protocol-Aware Cross-Layer Compression for Compact Network Traffic Representation
• TraceCodec: A Compiler-Backed Neural Codec for Network Traffic Traces
• Embodied AI in 6G Networks: From Intelligent Connectivity to Physical Intelligence
• Lightweight GenAI for Network Traffic Generation: Fidelity, Augmentation, and Classification
• NetRL: Powering Network Decisions via NetGRPO-Driven Reinforcement Learning