A Controlled Study of Memory Hierarchy Transitions in Quantum Circuit Simulation on Apple M4 Pro Unified Memory Architecture
The study investigated memory performance in quantum circuit simulations on Apple M4 Pro, focusing on how memory access patterns affect speedup. It found that peak streaming bandwidth is a poor predictor of actual simulation speedup for non-contiguous accesses, revealing a reproducible timing cliff at 28 qubits where tensordot backends slow down significantly.