Vulnerability-Weighted Routing of Timing-Critical Nets for Configuration-Upset-Resilient SRAM-Based FPGAs
The paper introduces a vulnerability-weighted routing method for SRAM FPGAs that goes beyond standard timing and congestion checks. It incorporates predicted routing-fault severity directly into the routing objective by adding terms for continuous vulnerability and configuration concentration. This allows the system to prioritize rerouting nets most susceptible to configuration-induced delay degradation, leading to significant aggregate vulnerability reduction.