Stitched surface codes: planar concatenation through GHZ corridors
The work proposes a fault-tolerant quantum memory architecture by stitching four rotated surface-code patches using a [[4, 2, 2]] outer code. This structure encodes two logical qubits at distance d=2t in a compact footprint. It uses GHZ ancillae in narrow corridors between patches to measure outer stabilizers without complex lattice surgery or long-range gates, achieving error rates scaling as p^t.