QubiC 2.0: An Extensible Open-Source Qubit Control System Capable of Mid-Circuit Measurement and Feed-Forward

Introduction to the show: ident: Quantum Radio. Generated commentary on the latest quantum physics and condensed matter papers.

Kai: We're looking at the paper: "QubiC 2.0: An Extensible Open-Source Qubit Control System Capable of Mid-Circuit Measurement and Feed-Forward".

Mira: Here's the gist of the paper. Researchers developed QubiC 2.0, an extensible open-source FPGA-based quantum bit control system capable of mid-circuit measurement and feed-forward for superconducting qubits, which provides powerful tools to explore and implement advanced quantum algorithms and applications<ref:2309.10333#pg2> System Architecture QubiC 2.0 is an extensible open-source qubit control system that uses the Xilinx RFSoC ZCU216 platform together with a customized AFE board<ref:2309.10333#pg3> The system utilizes a portable FPGA gateware with distributed processors to handle commands on-the-fly The architecture is designed for design simplicity and straightforward scaling, adopting a multi-core distributed architecture, assigning one processor core per qubit Hardware Components The QubiC system deployed on the ZCU216 platform offers advanced radio frequency (RF) data processing and synchronization capabilities The ZCU216 features a Gen 3 Zynq UltraScale+ RFSoC with specific specifications including 930 K system logic cells, 16-ch 14-bit RF-DAC @ 9.85 giga samples per second (GSPS), and a 16-ch 14-bit RF-ADC @ 2.5 GSPS To facilitate control, the digital signal processing (DSP) frequency is set to be 500 MHz on ZCU216 in the QubiC system A customized analog front-end board for ZCU216 features two RFMC 2.0 connectors, accommodating 16 DAC and 16 ADC channels respectively This analog front-end board incorporates a balun to convert differential signals to singleended and vice versa, and includes low-noise amplifiers to amplify the DAC signals FPGA Gateware and Processing The fully open-source QubiC gateware provides the low level access to researchers, capable of generating waveform form parameters which leads to the benefit of pulse sequence reuse The gateware is designed with low latency and optimized to do the real-time control on FPGA for mid-circuit measurement and feed-forward The QubiC 2.0 FPGA gateware contains the Zynq (PYNQ) framework on Zynq UltraScale+, advanced extensible interface (AXI) interconnection, a customized intellectual property (IP) for programmable logic (PL) / processing system (PS) units, and RF data converter (RFDC) The implementation of the advanced extensible interface (AXI), a communication bus protocol integrated on-chip, facilitates interconnection between the Zynq and essential components such as the RFDC, DSP register block, configuration register block, and block random-access memory (BRAM) control block The distributed processor consists of a set of cores with interfaces for receiving processed quantum measurement results and synchronization among different cores Each processor core executes a program consisting of timed pulse commands for its AWG(s), as well as instructions for implementing arbitrary control flow within the program based on either external input or internal state Digital Signal Processing and Pulse Generation Superconducting qubits are precisely controlled and measured using RF pulses, typically amplitude-modulated signals with parameterized frequency, initial phases, and predefined envelopes The digital generation of these pulses employs complex multiplication of the carrier and the modulation envelope Each qubit has its dedicated DAC channel, while the readout drive outputs are combined and directed to a single readout drive DAC, known as multiplexed readout The accumulation process acts as a low-pass filter, down-converting the signal to the frequency of interest, and the filtered data is then stored in the corresponding buffer for subsequent qubit state discrimination There is a bank of soft-processor cores capable of parameterizing and triggering RF control/measurement pulses synthesized using direct digital synthesis (DDS)-based pulse generators on the FPGA gateware DSP The pulse envelope is carefully optimized during the qubit gate calibration process and is stored in the FPGA memory as complex numbers, with each point containing in-phase and quadrature-phase terms Running a quantum circuit on QubiC 2.0 is remarkably efficient as it loads only the required commands instead of the entire waveform data points Control and Feedback Mechanisms The system implements fast reset logic by implementing qubit status classification and the feedback loop within the FPGA gateware, ensuring minimal latency This method involves a single-shot measurement of the qubit state, followed by a conditional single-qubit gate operation to rotate it into the ground state if found in an excited state Mid-circuit measurement and feed-forward experiments are achievable with QubiC 2.0’s capabilities, enabling the realization of advanced quantum algorithms For a conditional bit flip circuit, if Q0 mid-circuit measurement yields 1 >, two consecutive X90 gates will be applied on Q1 This demonstrates the successful mid-circuit measurement and feed-forward functionality of the system Synchronization Techniques Synchronization among multiple devices is vital for scaling up the system effectively, with clock synchronization being a primary objective to achieve precise phase alignment for all clock signals in each module Deterministic Clock Distribution is achieved by employing nested dual phaselocked loop (PLL) in zero-delay mode (ZDM) in LMK04828 of ZCU216 for deterministic clock distribution Multi-DAC Synchronization (MTS) is a vital feature to synchronize operation across multiple tiles and facilitate seamless coordination and data transfer between different DAC and ADC elements To achieve multi-FPGA synchronization, the FPGAs should share an identical reference clock following the deterministic clock distribution process Multi-FPGA Synchronization involves transmitting a Sync message at t1 in the primary clock domain and receiving a Delay Req message at t3 in the secondary clock domain The transit time for the Sync message can be calculated as delay = (t4−t1)−(t3−t2), while the constant offset between the primary and secondary clocks can be determined as offset = (t2−t1)−(t4−t3) Bench tests confirmed that the signal root mean square (RMS) jitter @ 6.50 GHz on ZCU216 was measured to be 1.8 ps (integrating from 10 Hz to 100 MHz) and 7.4 ps (integrating from 0.

Paper summary: Kai: So, to recap the paper QubiC two point zero: An Extensible Open-Source Qubit Control System Capable of Mid-Circuit Measurement and Feed-Forward, the main point is they developed this system after years of calibration experience on version one <ref:2309.10333#pg1,QubiC 2.0: An Extensible Open-Source Qubit Control System Capable of>.

Mira: They recognized that mid-circuit measurements and feedforward capabilities were necessary to implement advanced quantum algorithms effectively, which is the driving motivation for this upgrade.

Lev: The paper claims they upgraded QubiC one point zero to QubiC two point zero specifically following the development of RFSoC technology, which allowed them to incorporate these enriched features onto a ZCU216 board <ref:2309.10333#pg1,following the development of RFSoC technology>.

Kai: They built this system using an Xilinx ZCU216 evaluation board and developed all these features, including the mid-circuit measurement and feedforward capabilities.

Mira: The system uses portable FPGA gateware with a simplified processor to handle commands on the fly, which is what makes it relatively extensible and affordable in terms of implementation cost.

Lev: They adopted a multi-core distributed architecture assigning one processor core per qubit for design simplicity and straightforward scaling, which shows they were thinking about how this would run on real hardware.

Kai: The pulse envelopes are pre-stored in the FPGA's block RAMs to ensure speed and reusability throughout the quantum circuit, even though pulse parameters like amplitude and phase can be updated from pulse to pulse.

Mira: They describe a software stack developed in Python that runs on both the FPGA's ARM core and a host computer via XML-RPC, which lets researchers interact with it easily.

Lev: The system achieves multi-FPGA synchronization and low latency data communication, which they demonstrate through feedforward experiments on conditional circuits.

Kai: Plus, they’ve used this enhanced QubiC system as a platform for artificial intelligence and machine learning driven quantum control, like FPGA-based real-time quantum state discrimination.

Mira: Overall, the summary suggests that this work provides researchers with powerful tools to explore and implement advanced quantum algorithms and applications by giving them these new dynamic control capabilities.

Conclusion: Kai: So looking at the paper QubiC two point zero: An Extensible Open-Source Qubit Control System Capable of Mid-Circuit Measurement and Feed-Forward, we see they’ve built a system with mid-circuit measurement and feedforward for superconducting qubits <ref:2309.10333#pg1,QubiC 2.0: An Extensible Open-Source Qubit Control System Capable of>.

Mira: The authors chose to use an open-source FPGA-based quantum bit control system called QubiC, which is important for allowing the community to build upon this work.

Lev: What this means for the hardware side is that they’ve shown how these advanced features can be implemented on platforms like the ZCU216, which points toward a more integrated approach to RF data processing in quantum computing.

Kai: It shows that taking an existing system and adding mid-circuit measurement and feedforward capabilities can unlock new ways to run advanced quantum algorithms.

Mira: For anyone listening, this work means researchers now have a tool that supports dynamic control, which is essential for implementing the complex algorithms they're trying to study.

Lev: The main implication for running this on real hardware is how much overhead the mid-circuit measurement and feedforward adds to the actual latency of those conditional operations.

Kai: It’s about making sure that as we build out these systems, we aren't just controlling qubits sequentially, but dynamically based on what's happening during the process.

Mira: The paper QubiC two point zero is an extensible open-source qubit control system capable of mid-circuit measurement and feed-forward, which provides powerful tools to explore and implement advanced quantum algorithms > <ref:2309.10333#pg1,an extensible open-source qubit control system capable of mid-circuit measurement>